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  1 tm HCTS00MS radiation hardened quad 2-input nand gate pinouts 14 lead ceramic dual-in-line metal seal package (sbdip) mil-std-1835 cdip2-t14 top view 14 lead ceramic metal seal flatpack package (flatpack) mil-std-1835 cdfp3-f14 top view functional diagram truth table inputs outputs an bn yn llh lhh hlh hhl note: l = logic level low, h = logic level high a1 b1 y1 a2 b2 y2 gnd vcc b4 a4 y4 b3 a3 y3 1 2 3 4 5 6 7 14 13 12 11 10 9 8 14 13 12 11 10 9 8 2 3 4 5 6 7 1 a1 b1 y1 a2 b2 y2 gnd vcc b4 a4 y4 b3 a3 y3 (1, 4, 9, 12) an (2, 5, 10, 13) bn yn (3, 6, 8, 11 ) features ? 3 micron radiation hardened sos cmos  total dose 200k rad (si)  sep effective let no upsets: >100 mev-cm 2 /mg  single event upset (seu) immunity < 2 x 10 -9 errors/bit-day (typ)  dose rate survivability: >1 x 10 12 rad (si)/s  dose rate upset >10 10 rad (si)/s 20ns pulse  cosmic ray upset immunity < 2 x 10 -9 errors/gate day (typ)  latch-up free under any conditions  military temperature range: -55 o c to +125 o c  significant power reduction compared to lsttl ics  dc operating voltage range: 4.5v to 5.5v  lsttl input compatibility - vil = 0.8v max - vih = vcc/2 min  cmos input compatibility ii 5 a at vol, voh description the intersil HCTS00MS is a radiation hardened quad 2-input nand gate. a high on both inputs forces the output to a low state. the HCTS00MS utilizes advanced cmos/sos technology to achieve high-speed operation. this device is a member of radia- tion hardened, high-speed, cmos/sos logic family. the HCTS00MS is supplied in a 14 lead ceramic flatpack (k suffix) or a sbdip package (d suffix). ordering information part number temperature range screening level package hcts00dmsr -55 o c to +125 o c intersil class s equivalent 14 lead sbdip hcts00kmsr -55 o c to +125 o c intersil class s equivalent 14 lead ceramic flatpack hcts00d/ sample +25 o c sample 14 lead sbdip hcts00k/ sample +25 o c sample 14 lead ceramic flatpack hcts00hmsr +25 o c die die august 1995 spec number 518774 file number 2139.2 db na caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a trademark of intersil americas inc. copyright ? intersil americas inc. 2002. all rights reserved
2 specifications HCTS00MS absolute maximum ratings reliability information supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to +7.0v input voltage range, all inputs . . . . . . . . . . . . .-0.5v to vcc +0.5v dc input current, any one input . . . . . . . . . . . . . . . . . . . . . . . . 10ma dc drain current, any one output . . . . . . . . . . . . . . . . . . . . . . . 25ma (all voltage reference to the vss terminal) storage temperature range (tstg) . . . . . . . . . . . -65 o c to +150 o c lead temperature (soldering 10sec) . . . . . . . . . . . . . . . . . . +265 o c junction temperature (tj) . . . . . . . . . . . . . . . . . . . . . . . . . . +175 o c esd classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . class 1 thermal resistance ja jc sbdip package. . . . . . . . . . . . . . . . . . . . 74 o c/w 24 o c/w ceramic flatpack package . . . . . . . . . . . 116 o c/w 30 o c/w maximum package power dissipation at +125 o c ambient sbdip package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68w ceramic flatpack package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43w if device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: sbdip package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mw/ o c ceramic flatpack package . . . . . . . . . . . . . . . . . . . . . . 8.6mw/ o c caution: as with all semiconductors, stress listed under ?absolute maximum ratings? may be applied to devices (one at a time) w ithout resulting in permanent damage. this is a stress rating only. exposure to absolute maximu m rating conditions for extended periods may affect device rel iability. the conditions listed under ?electrical performance characteristics? are the only conditions recommended for satisfactory device operation.. operating conditions supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5v to +5.5v input rise and fall times at 4.5v vcc (tr, tf) . . . . . 100ns/v max operating temperature range (t a ) . . . . . . . . . . . . -55 o c to +125 o c input low voltage (vil). . . . . . . . . . . . . . . . . . . . . . . . . 0.0v to 0.8v input high voltage (vih) . . . . . . . . . . . . . . . . . . . . . . .vcc/2 to vcc table 1. dc electrical performance characteristics parameter symbol (note 1) conditions group a sub- groups temperature limits units min max quiescent current icc vcc = 5.5v, vin = vcc or gnd 1+25 o c-10 a 2, 3 +125 o c, -55 o c - 200 a output current (sink) iol vcc = 4.5v, vih = 4.5v, vout = 0.4v, vil = 0v 1+25 o c4.8-ma 2, 3 +125 o c, -55 o c4.0-ma output current (source) ioh vcc = 4.5v, vih = 4.5v, vout = vcc -0.4v, vil = 0v 1+25 o c-4.8-ma 2, 3 +125 o c, -55 o c-4.0-ma output voltage low vol vcc = 4.5v, vih = 2.25v, iol = 50 a, vil = 0.8v 1, 2, 3 +25 o c, +125 o c, -55 o c- 0.1 v vcc = 5.5v, vih = 2.75v, iol = 50 a, vil = 0.8v 1, 2, 3 +25 o c, +125 o c, -55 o c- 0.1 v output voltage high voh vcc = 4.5v, vih = 2.25v, ioh = -50 a, vil = 0.8v 1, 2, 3 +25 o c, +125 o c, -55 o cvcc -0.1 -v vcc = 5.5v, vih = 2.75v, ioh = -50 a, vil = 0.8v 1, 2, 3 +25 o c, +125 o c, -55 o cvcc -0.1 -v input leakage current iin vcc = 5.5v, vin = vcc or gnd 1+25 o c- 0.5 a 2, 3 +125 o c, -55 o c- 5.0 a noise immunity functional test fn vcc = 4.5v, vih = 2.25, vil = 0.80 (note 2) 7, 8a, 8b +25 o c, +125 o c, -55 o c- - - notes: 1. all voltages reference to device gnd. 2. for functional tests, vo 4.0v is recognized as a logic ?1?, and vo 0.5v is recognized as a logic ?0?. spec number 518774
3 specifications HCTS00MS table 2. ac electrical performance characteristics parameter symbol (notes 1, 2) conditions group a sub- groups temperature limits units min max input to yn tphl vcc = 4.5v 9 +25 o c 2 18 ns vcc = 4.5v 10, 11 +125 o c, -55 o c 2 20 ns input to yn tplh vcc = 4.5v 9 +25 o c 2 20 ns vcc = 4.5v 10, 11 +125 o c, -55 o c 2 22 ns notes: 1. all voltages referenced to device gnd. 2. ac measurements assume rl = 500 ? , cl = 50pf, input tr = tf = 3ns, vil = gnd, vih = 3v. table 3. electrical pe rformance characteristics parameter symbol conditions notes temperature limits units min max capacitance power dissipation cpd vcc = 5.0v, f = 1mhz 1 +25 o c - 38 pf 1 +125 o c, -55 o c - 72 pf input capacitance cin vcc = 5.0v, f = 1mhz 1 +25 o c - 10 pf 1 +125 o c - 10 pf output transition time tthl ttlh vcc = 4.5v 1 +25 o c - 15 ns 1 +125 o c - 22 ns note: 1. the parameters listed in table 3 are controlled via design or process parameters. min and ma x limits are guaranteed but not d irectly tested. these parameters are characteri zed upon initial design release and upon design changes which affect these characteristi cs.. table 4. dc post radiation electrical performance characteristics parameter symbol (notes 1, 2) conditions temperature 200k rad limits units min max quiescent current icc vcc = 5.5v, vin = vcc or gnd +25 o c-0.2ma output current (sink) iol vcc = 4.5v, vin = vcc or gnd, vout = 0.4v +25 o c4.0-ma output current (source) ioh vcc = 4.5v, vin = vcc or gnd, vout = vcc -0.4v +25 o c-4.0-ma output voltage low vol vcc = 4.5v and 5.5v, vih = vcc/2, vil = 0.80v, iol = 50 a +25 o c-0.1v output voltage high voh vcc = 4.5v and 5.5v, vih = vcc/2, vil = 0.80v, iol = -50 a +25 o cvcc -0.1 -v input leakage current iin vcc = 5.5v, vin = vcc or gnd +25 o c- 5 a noise immunity functional test fn vcc = 4.5v, vih = 2.25v, vil = 0.80v, (note 3) +25 o c--- input to yn tphl vcc = 4.5v +25 o c 2 20 ns tplh vcc = 4.5v +25 o c 2 22 ns notes: 1. all voltages referenced to device gnd. 2. ac measurements assume rl = 500 ? , cl = 50pf, input tr = tf = 3ns, vil = gnd, vih = 3v. 3. for functional tests vo 4.0v is recognized as a logic ?1?, and vo 0.5v is recognized as a logic ?0?. spec number 518774
4 specifications HCTS00MS table 5. burn-in and operating life test, delta parameters (+25 o c) parameter group b subgroup delta limit icc 5 3 a iol/ioh 5 -15% of 0 hour table 6. applicable subgroups conformance groups method group a subgroups read and record initial test (preburn-in) 100%/5004 1, 7, 9 icc, iol/h interim test i (postburn-in) 100%/5004 1, 7, 9 icc, iol/h interim test ii (postburn-in) 100%/5004 1, 7, 9 icc, iol/h pda 100%/5004 1, 7, 9, deltas interim test iii (postburn-in) 100%/5004 1, 7, 9 icc, iol/h pda 100%/5004 1, 7, 9, deltas final test 100%/5004 2, 3, 8a, 8b, 10, 11 group a (note 1) sample/5005 1, 2, 3, 7, 8a, 8b, 9, 10, 11 group b subgroup b-5 sample/5005 1, 2, 3, 7, 8a, 8b, 9, 10, 11, deltas subgroups 1, 2, 3, 9, 10, 11 subgroup b-6 sample/5005 1, 7, 9 group d sample/5005 1, 7, 9 note: 1. alternate group a testing in accordanc e with method 5005 of mil-std-883 may be exercised. table 7. total dose irradiation conformance groups method test read and record pre rad post rad pre rad post rad group e subgroup 2 5005 1, 7, 9 table 4 1, 9 table 4 (note 1) note: 1. except fn test which will be performed 100% go/no-go. spec number 518774
5 specifications HCTS00MS table 8. static and dynamic burn-in test connections open ground 1/2 vcc = 3v 0.5v vcc = 6v 0.5v oscillator 50khz 25khz static burn-in i test conditions (note 1) 3, 6, 8, 11 1, 2, 4, 5, 7, 9, 10, 12, 13 -14-- static burn-in ii test connections (note 1) 3, 6, 8, 11 7 - 1, 2, 4, 5, 9, 10, 12, 13, 14 -- dynamic burn-in i test connections (note 2) - 7 3, 6, 8, 11 14 1, 2, 4, 5, 9, 10, 12, 13 - notes: 1. each pin except vcc and gnd will have a resistor of 10k ? 5% static burn-in. 2. each pin except vcc and gnd will have a resistor of 1k ? 5% dynamic burn-in. table 9. irradiation test connections open ground vcc = 5v 0.5v 3, 6, 8, 11 7 1, 2, 4, 5, 9, 10, 12, 13, 14 note: each pin except vcc and g nd will have a resistor of 47k ? 5%. group e, subgroup 2, sample size is 4 dice/wafer, 0 failures. spec number 518774
6 HCTS00MS intersil space level product flow - ?ms? wafer lot acceptance (all lots) method 5007 (includes sem) gamma radiation verification (each wafer) method 1019, 4 samples/wafer, 0 rejects 100% nondestructive bond pull, method 2023 sample - wire bond pull monitor, method 2011 sample - die shear monitor, method 2019 or 2027 100% internal visual inspection, method 2010, condition a 100% temperature cycle, method 1010, condition c, 10 cycles 100% constant acceleration, method 2001, condition per method 5004 100% pind, method 2020, condition a 100% external visual 100% serialization 100% initial electrical test (t0) 100% static burn-in 1, condition a or b, 24 hrs. min., +125 o c min., method 1015 100% interim electrical test 1 (t1) 100% delta calculation (t0-t1) 100% static burn-in 2, condition a or b, 24 hrs. min., +125 o c min., method 1015 100% interim electrical test 2 (t2) 100% delta calculation (t0-t2) 100% pda 1, method 5004 (notes 1and 2) 100% dynamic burn-in, condition d, 240 hrs., +125 o c or equivalent, method 1015 100% interim electrical test 3 (t3) 100% delta calculation (t0-t3) 100% pda 2, method 5004 (note 2) 100% final electrical test 100% fine/gross leak, method 1014 100% radiographic, method 2012 (note 3) 100% external visual, method 2009 sample - group a, method 5005 (note 4) 100% data package generation (note 5) notes: 1. failures from interim electrical test 1 and 2 are combined for determining pda 1. 2. failures from subgroup 1, 7, 9 and deltas are used for calculating pda. the maximum allowable pda = 5% with no more than 3% o f the failures from subgroup 7. 3. radiographic (x-ray) inspection may be performed at any point after serialization as allowed by method 5004. 4. alternate group a testing may be performed as allowed by mil-std-883, method 5005. 5. data package contents:  cover sheet (intersil name and/or logo, p.o. number, customer part number, lot date code, intersil part number, lot number, qu an- tity).  wafer lot acceptance report (method 5007). includes reproductions of sem photos with percent of step coverage.  gamma radiation report. contains cover page, disposition, rad dose, lot number, test package used, specification numbers, test equipment, etc. radiation read and record data on file at intersil.  x-ray report and film. includes penetrometer measurements.  screening, electrical, and group a attributes (screening attributes begin after package seal).  lot serial number sheet (good units serial number and lot number).  variables data (all delta operations). data is identified by serial number. data header includes lot number and date of test.  the certificate of conformance is a part of the shipping invoice and is not part of the data book. the certificate of conforma nce is signed by an authorized quality representative. spec number 518774
7 HCTS00MS ac timing diagrams ac voltage levels parameter hcts units vcc 4.50 v vih 3.00 v vs 1.30 v vil 0 v gnd 0 v vs input output output tthl 80% 20% 80% 20% vih vil voh vol voh vol tplh tphl vs ttlh ac load circuit dut test cl rl point cl = 50pf rl = 500 ? spec number 518774
8 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com HCTS00MS die characteristics die dimensions: 87 x 88 mils 2.20mm x 2.24mm metallization: type: alsi metal thickness: 11k ? 1k ? glassivation: type: sio 2 thickness: 13k ? 2.6k ? worst case current density: <2.0 x 10 5 a/cm 2 bond pad size: 100 m x 100 m 4 x 4 mils metallization mask layout HCTS00MS (1) a1 (14) vcc (13) b4 b1 (2) y1 (3) a2 (4) b2 (5) (12) a4 (11) y4 (10) b3 (9) a3 y2 (6) gnd (7) y3 (8) spec number 518774


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